gpuemu¶
Catch silently-wrong GPU kernels before they reach production.
The problem¶
The industry-standard correctness oracle for an LLM-generated GPU kernel is one line:
One shape. One dtype. One seed. Every modern LLM-kernel benchmark — KernelBench, TritonBench, GEAK, KernelBand, STARK — uses the same oracle. The kernels that pass it are the kernels that ship to production.
That oracle is blind to bug classes that LLM-generated CUDA / Triton code routinely contains:
- Tail-mask leaks in fused reductions (softmax
other=0.0instead of-inf). - Accumulator scale bugs in matmul (
acc=instead ofacc+=). - Missing normalisation in attention (forgotten
1/√D). - Online-softmax rescale bugs in flash-attention (forgotten
acc *= α).
In our measured 26-op corpus across five GPU classes the standard oracle accepts 10 / 10 of these LLM-style buggy kernels as correct (P1).
→ Read the full problem walkthrough
Why it matters for the industry¶
Every modern LLM training and inference stack now ships LLM-generated CUDA / Triton kernels. A silently-wrong kernel runs at scale: a miscompiled matmul propagates through every forward pass; a broken flash-attention degrades long-context quality without crashing; an unmasked reduction taints metrics no one looks at. The cost is GPU-hours wasted on silently-broken work and slow, untraceable quality regressions that survive months of CI green builds.
Every published LLM-kernel benchmark shares the same oracle gap. The kernels they bless are the kernels that ship.
→ Read the industry impact in detail
What gpuemu does¶
gpuemu replaces "allclose on one shape" with an operator-domain-aware correctness regime backed by four measured studies (P1–P4).
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Op-schema-aware fuzzing
Per-operator shape generators with boundary, regular, and adversarial value distributions.
Measured: 99 % bug recall under adversarial sampling (P3).
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fp64 reference + calibrated tolerances
High-precision CPU reference; per-op
atol/rtolderived from p95-of-controls.Measured: 100 % illusion catch with 0 false positives across 5 GPU classes (P1); +23 pp recall over fixed
atol/rtol(P2). -
Static PTX gating
Register pressure, spills, instruction count from the compiled artifact.
Measured: structural Δregs predicts Δperf% consistently across H100 / A100 / L40S / A10 / 3060 (P4).
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Reproducible failures
Bit-identical xorshift128+ in Rust and Python; exact input snapshots; byte-for-byte replay.
How gpuemu compares — and who already uses it¶
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Compared to alternatives
Where gpuemu fits next to
torch.testing.assert_close, KernelBench, NVIDIA Compute Sanitizer, Triton's own testing, HF Kernel Hub, and the OSS DL fuzzers. -
Who uses gpuemu
Three customer workflows — frontier-lab kernel teams, OSS-inference maintainers, and inference-as-a-service vendors — each with a real cited issue that the workflow prevents.
Where to go next¶
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Get started in 5 minutes
Install the CLI, the Python client, and run your first validation.
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Read a guide
For kernel authors, model developers, or custom-op integrators.
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Run a tutorial
PyTorch, JAX, TensorFlow validation in 10 minutes each.
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Architecture deep dive
Daemon, client, IPC protocol, sled storage, fuzzer internals.
Supported frameworks¶
Platform support¶
| Platform | Status | Notes |
|---|---|---|
| Linux | Primary | Full workflow including artifact inspection |
| macOS | Core | CPU validation works fully; artifact inspection optional |
| Windows | Future | Not currently targeted |